Senior Lead Engineer/Lead Engineer, Digital IC Design

Hong Kong Applied Science and Technology Research Institute (ASTRI) is founded in 2000 by the Government of the Hong Kong Special Administrative Region. As Hong Kong’s largest government-funded research and development centre, ASTRI is a key force and super‑connector driving innovation and technology advancement in Hong Kong, the Greater Bay Area, and the global innovation ecosystem. This role is strengthened through its merger with Nano and Advanced Materials Institute (NAMI).

Committed to bringing high‑impact research from lab to market, ASTRI advances interdisciplinary, market‑driven R&D that delivers practical innovations for industry and meaningful benefits for society.

Its technological strengths and capabilities enable AI‑powered, cross‑disciplinary ICT and advanced materials solutions across Smart City, Financial Technologies, Digital Health and Life Sciences, New Industrialisation and Intelligent Manufacturing, Application-Specific Integrated Circuits (ASIC) and Advanced Electronics, New Energy and Energy Storage, and Green and ESG Technologies.

Over the years, ASTRI has cultivated a strong pool of I&T talent and earned numerous international awards for its pioneering innovations and contributions to industry and the community. Following the merger with NAMI, ASTRI’s cumulative global patent portfolio has grown to over 1,500, with more than 2,200 technologies successfully transferred to industry.

With enhanced scale and capabilities, ASTRI is uniquely positioned to elevate Hong Kong’s innovation capacity, accelerate technology commercialisation, and drive societal and economic progress through world‑class applied research.

​​​Job Responsibilities:

• Digital IC design (front-end and back-end); FPGA prototyping; full-flow tape-out from architecture/specification to chip bring-up
• Design and verify AI accelerator through RTL coding
• Collaborate with software and algorithm teams to develop optimized hardware architectures
• Participating in system integration for commercialization
• Perform ad-hoc duties as assigned

Job Requirements:

• Master’s degree or above in Electronic Engineering or relevant disciplines with minimum 5 years of related experience. Candidates with less experience may also be considered as Senior Engineer/Engineer
• Hands-on experience in Verilog coding, IC design and verification is a must
• Experience in FPGA prototyping, back-end design, SoC integration and development is preferred
• Knowledge on AI accelerator design is an advantage
• Team player with good analytical skill, trouble shooting, and communication skill 
• Passionate about new technology
  
• Good command of written and spoken English, Cantonese, and Putonghua
• Live ASTRI values

The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.

For interested parties, please submit your application with detailed CV within two weeks of the post date. Applicants are encouraged to submit their applications as soon as possible. The review of applications will continue until post is filled.

The resume should not include any sensitive personal information such as ID card no. or travel document number etc.

Position offer is subject to the applicant’s experience and academic qualification. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.

ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only. For details, please refer to ASTRI Privacy Policy Statement.