Senior Lead Engineer/ Lead Engineer, ASIC Design

The Hong Kong Applied Science and Technology Research Institute (ASTRI) was founded by the Government of the Hong Kong Special Administrative Region in 2000 with the mission of enhancing Hong Kong’s competitiveness through applied research. ASTRI’s core R&D competence in various areas is grouped under five Technology Divisions: Communications Technologies, Artificial Intelligence and Trust Technologies, Advanced Electronic Components and Systems, IoT Sensing and AI Technologies, and Innovative Mind.

It is applied across six core areas which are Smart City, Financial Technologies, New Industrialisation and Intelligent Manufacturing, Digital Health, Application Specific Integrated Circuits, and Metaverse.

Over the years, ASTRI has nurtured a pool of research, I&T talents and received numerous international awards for its pioneering innovations as well as outstanding business and community contributions. To date, ASTRI has transferred almost 1400 technologies to the industries and been granted more than 1000 patents in the Mainland, the US, and other countries.

To support our constant endeavour to position Hong Kong as a world-class smart city and an international hub of innovation and technology, we are seeking qualified professionals to fill the following position(s):

Job Resposibilities:

• Assist in R&D project development.
• Conduct research in RISC-V architecture, cryptography accelerator and Remote Direct Memory Access (RDMA).
• Carry out logic design, module-level or top-level verification.
• Work with the technical team to implement RISC-V SoC on FPGA.
• Carry out firmware design to support ASIC/FPGA development.
• Work with Software engineers to boot up RISC-V processor.

Job Requirements:
 

• Ph.D. or Master holder in Computer Science, Electronic Engineering, Electrical Engineering, Information Engineering, IC Design or relevant disciplines with minimum 3 years of related experiences. Candidate with less experiences may also be considered.
• Experience in HDL coding is highly preferred.
• Hands-on experience in IC design and verification is highly preferred.
• Experience in processor integration and development is an advantage.
• Knowledge on cryptography accelerator and RDMA is an advantage.
• Experience in FPGA prototyping and debugging is an advantage.
• Excellent analytical and troubleshooting skills is highly preferred.
• Passionate about new technology.

The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.

For interested parties, please submit your application with detailed CV within two weeks of the post date. Applicants are encouraged to submit their applications as soon as possible. The review of applications will continue until post is filled.

The resume should not include any sensitive personal information such as ID card no. or passport number, photo, etc.

Position offer is subject to the applicant’s experience and academic qualification. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.

ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only. For details, please refer to ASTRI Privacy Policy Statement.