Senior Lead Engineer, Lead Engineer, Senior Engineer, ASIC Design

The Hong Kong Applied Science and Technology Research Institute (ASTRI) was founded by the Government of the Hong Kong Special Administrative Region in 2000 with the mission of enhancing Hong Kong’s competitiveness through applied research. ASTRI’s core R&D competence in various areas is grouped under five Technology Divisions: Communications Technologies, Artificial Intelligence and Trust Technologies, Advanced Electronic Components and Systems, IoT Sensing and AI Technologies, and Intelligent Perception and Control Technologies.

It is applied across six core areas which are Smart City, Financial Technologies, New Industrialisation and Intelligent Manufacturing, Digital Health, Application Specific Integrated Circuits, and Metaverse.

Over the years, ASTRI has nurtured a pool of research, I&T talents and received numerous international awards for its pioneering innovations as well as outstanding business and community contributions. ASTRI has transferred about 1,600 technologies to the industries and has been granted close to 1,200 patents in the Mainland, the United States, and other countries.

To support our constant endeavour to position Hong Kong as a world-class smart city and an international hub of innovation and technology, we are seeking qualified professionals to fill the following position(s):

Job Responsibilities:

• Assist in R&D project development.
• Conduct research on post-quantum cryptography based on the RISC-V architecture.
• Perform logic design, module-level or top-level verification.
• Collaborate with the technical team to implement RISC-V SoC on FPGA.
• Develop firmware design to support ASIC/FPGA development.
• Work with software engineers to boot up RISC-V processor.
• Perform ad-hoc duties as assigned.

Job Requirements: 

• PhD holder or Master's degree in Computer Engineering/ Electronic Engineering/ Electrical Engineering/ Information Engineering/ IC Design or relevant disciplines with minimum 3 years of related experience. Candidates with less experience may also be considered.
• Experience in HDL coding is a plus.
• Hands-on experience in IC design and verification is highly preferred.
• Experience in processor integration and development is an advantage.
• Knowledge of post-quantum cryptography is an advantage.
• Experience in FPGA prototyping and debugging is an advantage.
• Excellent analytical and troubleshooting skills are highly preferred.
• Lives ASTRI values.

The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.

For interested parties, please submit your application with detailed CV within two weeks of the post date. Applicants are encouraged to submit their applications as soon as possible. The review of applications will continue until the post is filled.

The resume should not include any sensitive personal information such as ID card no. or travel document number, etc.

Position offer is subject to the applicant’s experience and academic qualification. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.

ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only. For details, please refer to ASTRI Privacy Policy Statement.