Engineer, FPGA Development

Hong Kong Applied Science and Technology Research Institute (ASTRI) is founded in 2000 by the Government of the Hong Kong Special Administrative Region. As Hong Kong’s largest government-funded research and development centre, ASTRI is a key force and super‑connector driving innovation and technology advancement in Hong Kong, the Greater Bay Area, and the global innovation ecosystem. This role is strengthened through its merger with Nano and Advanced Materials Institute (NAMI).

Committed to bringing high‑impact research from lab to market, ASTRI advances interdisciplinary, market‑driven R&D that delivers practical innovations for industry and meaningful benefits for society.

Its technological strengths and capabilities enable AI‑powered, cross‑disciplinary ICT and advanced materials solutions across Smart City, Financial Technologies, Digital Health and Life Sciences, New Industrialisation and Intelligent Manufacturing, Application-Specific Integrated Circuits (ASIC) and Advanced Electronics, New Energy and Energy Storage, and Green and ESG Technologies.

Over the years, ASTRI has cultivated a strong pool of I&T talent and earned numerous international awards for its pioneering innovations and contributions to industry and the community. Following the merger with NAMI, ASTRI’s cumulative global patent portfolio has grown to over 1,500, with more than 2,200 technologies successfully transferred to industry.

With enhanced scale and capabilities, ASTRI is uniquely positioned to elevate Hong Kong’s innovation capacity, accelerate technology commercialisation, and drive societal and economic progress through world‑class applied research.

To support our constant endeavour to position Hong Kong as a world-class smart city and an international hub of innovation and technology, we are seeking qualified professionals to fill the following position(s):

Job Responsibilities:

• Participate and contribute to physical layer (PHY) FPGA solution development in multiple platforms in ASTRI’s 5G/6G R&D projects.
• Engage in activities including the followings:
  • Develop high performance wireless communications FPGA solutions for 5G/6G L1 Physical (PHY) layer.
  • Optimize and troubleshoot FPGA solutions in target platforms to fulfil high performance and real time deadline requirements.
  • Perform RTL coding, synthesis, Implementation, and speed & area optimization in FPGA.
  • Design testbench and conduct simulations & on-board debugging.
  • Co-work with hardware and software Engineer in development.
  • Troubleshoot and setup hardware platforms for development.
  • Build up know-hows on 5G/6G standardization.
• Perform ad hoc duties as assigned.

Job Requirements:

• Master or Bachelor’s in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, Information Engineering, Telecommunications, or relevant disciplines.
• Successfully completed the undergraduate/postgraduate program.
• Fresh graduates may also be considered.
• Knowledge of wireless communications standard, such as 5/6G, ORAN, WiFi, Bluetooth a plus.
• Experience with Verilog RTL coding and testbench design.
• Familiar with large FPGA development on Xilinx devices.
• Experience with Xilinx’s build flow including design entry in Verilog, synthesis, place and route, timing constraints and timing closure.
• Experience with scripting languages: Python, tcl or equivalent, a plus.
• Live ASTRI values.

The appointment will be on renewable contract terms with a competitive salary and performance-linked gratuity. Fringe benefits include paid leave, medical, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.

For interested parties, please submit your application with detailed CV within two weeks of the post date. Applicants are encouraged to submit their applications as soon as possible. The review of applications will continue until the post is filled.

The resume should not include any sensitive personal information such as ID card no. or travel document number, etc.

Position offer is subject to the applicant’s experience and academic qualification. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.

ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only. For details, please refer to ASTRI Privacy Policy Statement.