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Principal Engineer/Senior Lead Engineer, Digital IC Design

Ref. ID:  CEO/ICS/MLP/1423


The Hong Kong Applied Science and Technology Research Institute (ASTRI) was founded by the Government of the Hong Kong Special Administrative Region in 2000 with the mission of enhancing Hong Kong’s competitiveness through applied research. ASTRI’s core R&D competence in various areas is grouped under four Technology Divisions: Communications Technologies, Trust and AI Technologies, Integrated Circuits and Systems, and IoT Sensing and AI Technologies.

It is applied across six core areas which are Smart City, Financial Technologies, New Industrialisation and Intelligent Manufacturing, Digital Health, Application Specific Integrated Circuits, and Metaverse.

Over the years, ASTRI has nurtured a pool of research, I&T talents and received numerous international awards for its pioneering innovations as well as outstanding business and community contributions. To date, ASTRI has transferred almost 1400 technologies to the industries and been granted more than 1000 patents in the Mainland, the US, and other countries.

To support our constant endeavour to position Hong Kong as a world-class smart city and an international hub of innovation and technology, we are seeking qualified professionals to fill the following position(s):

Job Responsibilities
•    Digital SoC/ASIC design (front-end and back-end); FPGA prototyping; full-flow tape-out experience from architecture/specification to chip bring-up
•    Participate in ASIC/FPGA DNN accelerator/AI module design and verification 
•    Work with software and algorithm team to come up with an optimized hardware architecture
•    Assist in R&D project’s planning and execution
•    Provide training and support to team members
•    Participating in system design and implementation for commercialization


Job Requirements

•    Bachelor degree or above in Electronic Engineering, Computer Engineering or relevant disciplines with minimum 7 years of related experience. Candidates with less experience may also be considered
•    Hands-on experience in Verilog coding, IC design and verification is a must
•    Experience in FPGA prototyping, SoC integration and development is preferred
•    Knowledge on analog circuit design is an advantage 
•    Experience in back-end design is an advantage
•    Team player with good analytical skill, trouble shooting, and communication skill 
•    Passionate about new technology
•    Live ASTRI values

For interested parties, please submit your application with detailed CV within two weeks of the post date. Applicants are encouraged to submit their applications as soon as possible. The review of applications will continue until post is filled.


The appointment will be on renewable contract terms with a competitive salary and performance-linked variable pay. Fringe benefits include paid leave, medical and dental benefits, insurance coverage and contribution to MPF. The incumbent will normally work a five-day week.


The resume should not include any sensitive personal information such as HKID or passport number, photo, etc.


Position offer is subject to the applicant’s experience and academic qualification. Only short-listed candidates will be notified. ASTRI reserves the right not to fill the position.


ASTRI is an Equal Opportunities Employer. Personal data provided by job applicants will be used exclusively for recruitment only. For details, please refer to ASTRI Privacy Policy Statement.

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